On June 6, 2026, Nvidia officially disclosed the complete hardware architecture details of the new generation Rubin flagship AI GPU to the public. The new product completely abandons the traditional single-chip packaging solution and adopts advanced packaging technology with high-order heterogeneity. GPU computing die, HBM high bandwidth storage die, IO interface die, and interconnect bridge chip are all packaged and integrated on the same substrate. The value of a single fully packaged device is 6-10 times that of traditional single-chip packaging products. Advanced packaging has officially become the standard manufacturing solution for high-end AI computing chips, driving the packaging substrate track to usher in disruptive technological iterations. On the same day, Intel publicly demonstrated EMIB packaging technology combined with glass core substrate integrated physical samples, overcoming the common technical difficulties in the industry of large-size ultra-thin processing of glass substrates without micro cracks, and completely eliminating the core technical obstacles to large-scale production of glass substrates.

Global semiconductor industry research institutions and leading wafer fabs have reached a consensus to officially define 2026 as the first year of commercialization of semiconductor glass substrates, marking a turning point in the replacement of decades old resin packaging substrate technology. The traditional BT resin substrate has reached its physical limit after multiple generations of iteration: the number of high-density wiring layers in advanced packaging multi die continues to increase, and the thermal expansion coefficient of the resin substrate is high, high-frequency signal loss is large, and large-size warping deformation is severe, making it unable to meet the requirements of ultra large multi die heterogeneous integrated packaging such as Rubin GPU. The substrate thickness, wiring density, and heat dissipation performance have all reached the physical ceiling, becoming a bottleneck restricting the continuous improvement of high-end AI chip computing power density. Glass substrates, with their four core advantages of extremely low thermal expansion coefficient, low high-frequency signal loss, large size and high flatness, and lower unit area cost, perfectly match the trend of advanced packaging high-density wiring, multi chip stacking, and ultra-thin integration technology. They have been selected as the carrier for the next generation of advanced packaging core substrates by TSMC, Samsung, and Intel, the three major wafer giants.

The three global wafer leaders have simultaneously finalized the production line implementation schedule: TSMC's COPOS glass substrate test line has completed equipment installation, customer sample verification will be launched in the first half of 2027, and large-scale mass production will be introduced in 2028; Samsung Electric plans to build its first glass substrate mass production line in the fourth quarter of 2027, prioritizing the supply of Samsung's own advanced packaging production line; Intel relies on its self-developed EMIB packaging technology and synchronously builds its own glass substrate processing production line to achieve a closed-loop integration of packaging and substrate. Industry calculation data shows that the global advanced packaging market size will be about 45 billion US dollars in 2024, with an average annual compound growth rate of 9.4%, and is expected to exceed 80 billion US dollars by 2030; The growth rate of the glass substrate subdivision track far exceeds that of the overall packaging industry. The global semiconductor packaging substrate market is expected to exceed 31.5 billion US dollars by 2029, and the penetration rate of glass substrates is rapidly increasing year by year.

Domestic substrate manufacturers are keeping up with the global pace of technological iteration. Two leading companies, BOE and Woge Optoelectronics, have completed the complete verification of semiconductor grade ultra-thin glass substrate engineering samples. The three core indicators of product flatness, wiring adhesion, and thermal stability are benchmarked against mass-produced products of overseas leading enterprises, and have obtained small batch trial orders from multiple advanced packaging manufacturers; Long term orders from some top customers have been scheduled until 2028, with strong certainty of capacity lock-in. In addition, multiple domestic glass deep processing and precision processing enterprises have simultaneously launched research and development of semiconductor glass substrates, forming a echelon of domestic substitute manufacturers matrix, no longer a single enterprise fighting alone.

The landing of technology brings about a complete industrial chain reconstruction: the upstream resin, glass fiber, and copper foil supporting material system of traditional BT resin substrates is gradually entering the mature stage, and there is a demand for a complete set of new process equipment for glass substrate dedicated lithography, metallization, and through-hole etching. Domestic semiconductor equipment manufacturers are entering a new equipment track at the same time; Advanced packaging foundries are no longer limited to traditional wire bonding and flip chip packaging processes, and must synchronize with glass substrate precision processing production lines. The capital expenditure structure of packaging and testing manufacturers is undergoing adjustments. Under the continuous iteration of AI computing chips, HBM stacking+advanced packaging+glass substrate has become a standardized hardware combination solution. The purchase amount of glass substrate for a single AI server continues to rise, and the medium and long-term incremental space is clear.

There are still stage obstacles to the short-term industrialization landing: the threshold for precision processing technology of semiconductor grade ultra-thin glass is extremely high, and the expected lead time for yield ramp up is 12-18 months. The low initial mass production yield rate increases the cost of single piece manufacturing; The downstream advanced packaging customers of glass substrates have a long verification cycle, and top chip manufacturers are conservative and cautious in introducing new substrate materials. The verification cycle for small batches is generally more than 6 months. But all three global wafer giants have a unified technology roadmap, and there is no divergence in the direction of technological iteration. The long-term trend of replacing resin substrates with glass substrates is irreversible.

Domestic manufacturers have a competitive advantage in misalignment: they have accumulated decades of precision processing experience in consumer electronics ultra-thin glass processing, and panel leaders such as BOE have mature glass cutting, grinding, and coating processes, requiring only targeted modifications to adapt to semiconductor grade cleanliness and wiring processes. The technology conversion cycle is much shorter than that of new overseas manufacturers; At the same time, the domestic advanced packaging production capacity continues to expand, and the global market share of the three leading packaging and testing companies, Changdian Technology, Tongfu Microelectronics, and Huatian Technology, is steadily increasing. Local substrate manufacturers have the advantage of nearby supporting facilities and fast joint debugging, and the speed of import substitution is expected to exceed industry expectations. As an advanced packaging core supporting material, the glass substrate track has officially entered a period of commercial landing explosion, becoming a new high growth sub segment of domestic semiconductor materials.