On May 11, 2026, the first standardized mass production line for 8-inch silicon optical chips in China, located in Suzhou Industrial Park, officially broke ground. The total investment of the project exceeds 6.2 billion yuan, and it is planned to be constructed in two phases. The first phase of the production line is expected to complete equipment installation and debugging in the third quarter of 2027 and achieve small batch wafer production. It is expected to operate at full capacity in the first quarter of 2028, with a designed annual wafer production capacity of 120000 8-inch silicon optical wafers; In the second phase, space is reserved for expansion synchronously, and the total production capacity is expected to increase to 250000 pieces/year in the long term, filling the gap in the standardized mass production line of silicon optical chips in Chinese Mainland, and completely reversing the industrial weakness that domestic silicon optical chips are all dependent on overseas OEM and cannot be independently mass produced.

Silicon optical chip is the core hardware of the new generation computing power infrastructure for optoelectronic fusion. Unlike traditional discrete optical devices, silicon optical technology reuses mature CMOS wafer manufacturing processes and integrates dozens of optical devices such as light emission, light reception, optical waveguide, splitter, modulator, etc. on the same silicon wafer, realizing the full process function of high-speed optical signal modulation, transmission, and demodulation on a single chip. A single silicon optical chip can replace dozens of traditional discrete optical components, with a hardware volume compression of more than 75%. At the same time, the high-speed interconnection bandwidth is increased by 3-5 times, and power consumption is reduced by 40%. It perfectly adapts to the iterative needs of 800G/1.6T high-speed optical modules in AI supercomputing servers and intelligent computing center cabinets. In the past three years, the iteration speed of global AI computing power servers has continued to accelerate, and the demand for interconnection bandwidth between servers within GPU clusters has exponentially increased. The bandwidth, power consumption, and integration of traditional copper wire electrical interconnection and discrete optical module solutions have all reached physical limits, and silicon optical technology has become the only feasible technical solution.

At the global industry level, TSMC's COUPE optical interconnect silicon optical technology has completed customer verification and entered the countdown stage of mass production. Samsung and Intel have simultaneously increased their research and development of silicon optical wafer processes, and all three global wafer giants have included silicon optical chips in their core technology strategic inventory for the next five years. Industry research firm LightCounting has officially defined 2026 as the first year of the global silicon optical industry boom. For the first time in the year, the proportion of silicon optical integrated solutions in global optical module sales will exceed 50%, officially replacing traditional discrete optical device solutions as the mainstream technology route for high-speed optical modules. The turning point of the industry has arrived comprehensively. Previously, the production capacity of silicon optical chip OEM was highly concentrated in TSMC Singapore and Taiwan, China factories. The production cycle of domestic optical module manufacturers to purchase silicon optical chips was up to 6-9 months, and the long order delivery cycle restricted the large-scale shipment of domestic high-speed optical modules.

The Suzhou 8-inch silicon photonics mass production line adopts a characteristic process route compatible with standard CMOS technology, which can directly reuse the existing equipment system of mature domestic 8-inch wafer fabs. The etching, thin film, and lithography front-end equipment do not require large-scale customization and transformation. Local semiconductor equipment manufacturers North Huachuang, Zhongwei Company, and Tuojing Technology can all supply in bulk. The design target for equipment localization rate is set at 68%, far higher than the local procurement ratio of overseas silicon photonics production line equipment. The production line is equipped with a silicon optical chip packaging and testing center and a reliability verification laboratory, realizing the localized closed-loop of the whole process of "streaming packaging testing reliability verification", no longer relying on the outsourcing processing of Taiwan, China, China and Southeast Asia packaging and testing plants, and completely building an independent silicon controlled optical industry chain.

On the downstream application end, the AI computing power cluster with 800G and 1.6T high-speed optical modules is the largest downstream demand for silicon optical chips. A single supercomputing server requires 8-16 silicon optical integrated optical modules, and the purchase amount of silicon optical chips for a 10000 card intelligent computing center can reach billions of yuan. Global leading optical module manufacturers such as Zhongji Xuchuang, Xinyisheng, and Guangxun Technology have already signed strategic supply framework agreements with the Suzhou production line in advance. After the production line is put into operation, priority will be given to locking in production capacity quotas to solve the bottleneck problem of upstream chips in high-speed optical modules. In addition to data center scenarios, the four major scenarios of vehicle mounted LiDAR, 5G/6G communication base stations, satellite inter satellite optical communication, and consumer electronics AR glasses have simultaneously opened up incremental space, and the long-term application boundaries of silicon optical chips continue to expand.

The localization of the industrial chain has a significant driving effect: upstream silicon optical special photoresist, optical waveguide special materials, and high-purity doping reagents have ushered in a window period for local supporting enterprises to verify and import; Midstream silicon optical IP core design companies no longer need to go overseas for chip production, reducing the R&D iteration cycle by 60%, and significantly lowering the R&D threshold for small and medium-sized optical chip design startups; Downstream high-speed optical module manufacturers have reduced their hardware costs by 22%, and their global market price competitiveness has synchronously improved.

Short term challenges objectively exist: the tuning cycle of silicon photonics characteristic process parameters is relatively long, and the yield ramp up is expected to take about 18 months. The initial mass production yield is lower than TSMC's mature production line; The barrier to entry for the optical coupling packaging process of silicon optical chips is extremely high, and there is still a gap in the technological accumulation of domestic packaging and testing enterprises. However, the global silicon photonics industry is in a synchronous starting stage, and there is no decades long gap in advanced processes. With mature 8-inch wafer production capacity and a complete downstream cluster of optical modules, China has the industrial foundation for synchronous competition and overtaking on bends. After the landing of the Suzhou mass production line, domestic optoelectronic fusion chips have officially entered the large-scale commercial cycle, seizing the initiative in the key track of global technology competition in the next generation of computing hardware.